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  3. Using on-chip networks to implement polymorphism in the co-design of object-oriented embedded systems
Using on-chip networks to implement polymorphism in the co-design of object-oriented embedded systems
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Using on-chip networks to implement polymorphism in the co-design of object-oriented embedded systems

Goudarzi, M

Using on-chip networks to implement polymorphism in the co-design of object-oriented embedded systems

Goudarzi, M ; Sharif University of Technology | 2007

559 Viewed
  1. Type of Document: Article
  2. DOI: 10.1016/j.jcss.2007.02.009
  3. Publisher: 2007
  4. Abstract:
  5. The Network-on-Chip (NoC) paradigm brings networks inside chips. We use the routing capabilities inside NoC to serve as a replacement for Virtual Method Table (VMT) for Object-Oriented (OO) designed hardware/software co-design systems where some methods could be implemented as hardware modules. This eliminates VMT area and performance overhead in OO co-designed embedded systems where resources are limited and where some functionality needs to be implemented in hardware to meet performance goals of the system. Our experimental results on real world embedded applications show up to 32.15% lower area and up to 5.1% higher speed compared to traditional implementation using VMT. © 2007 Elsevier Inc. All rights reserved
  6. Keywords:
  7. Chip scale packages ; Interconnection networks ; Network routing ; Polymorphism ; Virtual reality ; Application specific instruction processor (ASIP) ; Hardware software co-design ; Network on chip (NoC) ; Object oriented design ; Virtual method dispatch ; Embedded systems
  8. Source: Journal of Computer and System Sciences ; Volume 73, Issue 8 , December , 2007 , Pages 1221-1231 ; 00220000 (ISSN)
  9. URL: https://www.sciencedirect.com/science/article/pii/S0022000007000141