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The kautz mesh: a new topology for SoCs

Sabbaghi Nadooshan, R ; Sharif University of Technology | 2008

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  1. Type of Document: Article
  2. DOI: 10.1109/SOCDC.2008.4815632
  3. Publisher: 2008
  4. Abstract:
  5. Nowadays networks-on-chip are emerging as a hot topic in IC designs with high integration. In addition to popular mesh topologies, other structures can also be considered especially in 3D VLSI design. The Kautz topology is one of the interconnection architectures for multiprocessors. In this paper we propose an efficient three dimensional layout for a novel 2D mesh structure based on the Kautz topology. Simulation results show that by using the third dimension, performance and latency can be improved compared to the 2D VLSI implementation. ©2008 IEEE
  6. Keywords:
  7. 3D layout ; 3D NoCs ; 3D VLSI ; Kautz ; NoCs ; Performance evaluation ; Power consumption ; SoC ; Biological materials ; Design ; Electric power utilization ; Microprocessor chips ; Programmable logic controllers ; Topology ; Three dimensional
  8. Source: 2008 International SoC Design Conference, ISOCC 2008, Busan, 24 November 2008 through 25 November 2008 ; Volume 1 , 2008 , Pages I300-I303 ; 9781424425990 (ISBN)
  9. URL: https://ieeexplore.ieee.org/abstract/document/4815632