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  1. Domino temporal data prefetcher

Domino temporal data prefetcher

Bakhshalipour, M ; Sharif University of Technology | 2018

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  1. Type of Document: Article
  2. DOI: 10.1109/HPCA.2018.00021
  3. Publisher: IEEE Computer Society , 2018
  4. Abstract:
  5. Big-data server applications frequently encounter data misses, and hence, lose significant performance potential. One way to reduce the number of data misses or their effect is data prefetching. As data accesses have high temporal correlations, temporal prefetching techniques are promising for them. While state-of-the-art temporal prefetching techniques are effective at reducing the number of data misses, we observe that there is a significant gap between what they offer and the opportunity. This work aims to improve the effectiveness of temporal prefetching techniques. We identify the lookup mechanism of existing temporal prefetchers responsible for the large gap between what they offer and the opportunity. Existing lookup mechanisms either not choose the right stream in the history, or unnecessarily delay the stream selection, and hence, miss the opportunity at the beginning of every stream. In this work, we introduce Domino prefetching to address the limitations of existing temporal prefetchers. Domino prefetcher is a temporal data prefetching technique that logically looks up the history with both one and two last miss addresses to find a match for prefetching. We propose a practical design for Domino prefetcher that employs an Enhanced Index Table that is indexed by just a single miss address. We show that Domino prefetcher captures more than 90% of the temporal opportunity. Through detailed evaluation targeting a quad-core processor and a set of server workloads, we show that Domino prefetcher improves system performance by 16% over the baseline with no data prefetcher and 6% over the state-of- the-art temporal data prefetcher. © 2018 IEEE
  6. Keywords:
  7. Server workload ; Single address lookup ; Two address lookup ; Computer architecture ; Supercomputers ; Address lookup ; Data miss ; Data pre-fetching ; Performance potentials ; Prefetching techniques ; State of the art ; Temporal correlations ; Temporal prefetcher ; Big data
  8. Source: Proceedings - International Symposium on High-Performance Computer Architecture ; Volume 2018-February , 2018 , Pages 131-142 ; 15300897 (ISSN); 9781538636596 (ISBN)
  9. URL: https://ieeexplore.ieee.org/document/8327004