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  3. A low-latency and low-complexity point-multiplication in ECC

A low-latency and low-complexity point-multiplication in ECC

Salarifard, R ; Sharif University of Technology | 2018

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  1. Type of Document: Article
  2. DOI: 10.1109/TCSI.2018.2801118
  3. Publisher: Institute of Electrical and Electronics Engineers Inc , 2018
  4. Abstract:
  5. Elliptic curve cryptography (ECC) has received attention, because it can achieve the same security level as other asymmetric methods while using a key with smaller length. Although ECC is more efficient compared with other asymmetric methods, the fast computation of ECC is always desirable. In this paper, a fixed-base comb point multiplication method has been used to perform regular point multiplication. In addition, two low-complexity (LC) and low-latency (LL) architectures for the regular point multiplication using fixed-base comb method have been proposed. The point multiplication architectures have been implemented using field-programmable gate array and application-specific integrated circuit (ASIC). The LC architecture implementation results over GF(2 {233}) , GF(2 {163}) , and GF(2 {283}) show 62%, 46%, and 152% efficiency improvement, respectively. In addition, the LL architecture has 55%, 44%, and 76% reduction in point multiplication required time, respectively, over GF(2 {233}) , GF(2 {163}) , and GF(2 {283}). Moreover, ASIC results show 100% energy improvement for the LC architecture implementation results over GF(2 {163}). In addition, the LL architecture has 99% reduction in point multiplication required time, respectively, using a pentanomial. © 2004-2012 IEEE
  6. Keywords:
  7. Elliptic curve cryptography ; Fixed-base point multiplication ; Low-latency ; Unknown (regular) point multiplication ; Application specific integrated circuits ; Clocks ; Field programmable gate arrays (FPGA) ; Geometry ; Mathematical models ; Public key cryptography ; Asymmetric cryptography ; Complexity theory ; Fixed base ; Low latency ; Low-complexity ; Point multiplication ; Computer architecture
  8. Source: IEEE Transactions on Circuits and Systems I: Regular Papers ; Volume 65, Issue 9 , 2018 , Pages 2869-2877 ; 15498328 (ISSN)
  9. URL: https://ieeexplore.ieee.org/document/8306451