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  3. Two-state checkpointing for energy-efficient fault tolerance in hard real-time systems

Two-state checkpointing for energy-efficient fault tolerance in hard real-time systems

Salehi, M ; Sharif University of Technology

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  1. Type of Document: Article
  2. DOI: 10.1109/TVLSI.2015.2512839
  3. Publisher: Institute of Electrical and Electronics Engineers Inc
  4. Abstract:
  5. Checkpointing with rollback recovery is a well-established technique to tolerate transient faults. However, it incurs significant time and energy overheads, which go wasted in fault-free execution states and may not even be feasible in hard real-time systems. This paper presents a low-overhead two-state checkpointing (TsCp) scheme for fault-tolerant hard real-time systems. It differentiates between the fault-free and faulty execution states and leverages two types of checkpoint intervals for these two different states. The first type is nonuniform intervals that are used while no fault has occurred. These intervals are determined based on postponing checkpoint insertions in fault-free states, with the aim of decreasing the number of checkpoint insertions. The second type is uniform intervals that are used from the time when the first fault occurs. They are determined so as to minimize execution time for faulty states, leaving more time available for energy management in fault-free states. Experimental evaluation on an embedded processor (LEON3) and an emerging nonvolatile memory technology (ReRAM) illustrates that TsCp significantly reduces the number of checkpoints (62% on average) compared with previous works, while preserving fault tolerance. This results in 14% and 13% reduced execution time and energy consumption, respectively. Furthermore, we combine TsCp with dynamic voltage scaling (DVS) and achieve up to 26% (21% on average) energy saving compared with the state-of-the-art techniques
  6. Keywords:
  7. Checkpointing ; Embedded systems ; Energy management ; Real-time ; Reliability ; Energy conservation ; Energy efficiency ; Energy utilization ; Fault tolerance ; Interactive computer systems ; Voltage scaling ; Voltage stabilizing circuits ; Checkpoint intervals ; Emerging Non-volatile memory technology ; Experimental evaluation ; Fault-tolerant hard real-time systems ; Hard real-time systems ; Roll-back recoveries ; State-of-the-art techniques ; Well-established techniques ; Real time systems
  8. Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems ; Volume 24, Issue 7 , 2016 , Pages 2426-2437 ; 10638210 (ISSN)
  9. URL: http://ieeexplore.ieee.org/document/7387782