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Designing an Efficient Non-Volatile Approximate Main Memory Through Managing the Write Process

Karimpour, Morteza | 2015

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  1. Type of Document: M.Sc. Thesis
  2. Language: Farsi
  3. Document No: 47643 (19)
  4. University: Sharif University of Technology
  5. Department: Computer Engineering
  6. Advisor(s): Sarbazi Azad, Hamid
  7. Abstract:
  8. Memories today expose an all-or-nothing correctness model thatincurs significant costs in performance, energy, area, and designcomplexity. But not all applications need high-precision storagefor all of their data structures all of the time. This these proposesmechan-isms that enable applications to store data approximately in a phase change memory main memoryand shows that doing so can improve the performance and reduce the power consumption by proposing two mechanisms. The First allows errors in multi-level cells by reducing the number ofprogramming pulses used to write them. The second mechanism reduces the number of error-prone patterns in the content of data block through a lightweith mapping scheme. Simulations show that our proposal provides 36% lower energy dissipation and 30% average latency while reduces the quality of service by 10%
  9. Keywords:
  10. Phase Change Memory ; Multi Bit Storage Device ; Striping Bit Algnment ; Iteration Method ; Multi-Level Cell Phase Change Memory (MLC-PCM) ; Write Approximate ; Low Power and Low Energy Memory

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