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An efficient VLSI architecture of QPP interleaver/deinterleaver for LTE turbo coding
Ardakani, A

Cataloging brief

An efficient VLSI architecture of QPP interleaver/deinterleaver for LTE turbo coding
Author :   Ardakani, A
Publisher :  
Pub. Year  :   2013
Subjects :   Add-compare-select Efficient architecture Hardware interleaver Parallel decoding ...
Call Number :  

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